Many computing systems implement the Intelligent Platform Management Interface (IPMI) specification. In general, IMPI defines a set of common interfaces to computer hardware and firmware which system administrators can use to monitor system health and manage the system. IPMI allows administrators to manage a system remotely. System administrators can then use IPMI messaging to query platform status, to review hardware logs, or to issue other requests from a remote console through the same connections. The latest version of the IPMI specification is IPMI version 2.0 published Feb. 12, 2004.
Traditionally, computing systems implement IPMI using a management controller called the Baseboard Management Controller (BMC) and zero or more slave controllers located within the chassis of the computing system. The controllers are typically interconnected via a dedicated inter-chip physical interface called the IPMB (Intelligent Platform Management Bus/Bridge). The controllers communicate health and management information over the IPMB using dedicated IPMI messages. The IPMB is an enhanced implementation of an Inter-Integrated Chip (I2C) bus, which was developed by Philips Electronics.
As per the IPMB specification, the various controllers on the dedicated IPMB are assigned respective 8-bit IPMI slave addresses. Communications between the controllers over the IPMB occur in a broadcast nature, meaning all controllers receive each others' IPMI messages but only respond to those messages addressed to their assigned IPMI address.
While widely accepted, IPMI is often difficult to implement in complex multiprocessing computing environments, such as mainframe computers. Mainframe computers, for example, are becoming increasingly more complex and include large numbers of interconnected processors and resources (e.g., memory units) that may be dynamically configured into different processing partitions. More specifically, today's mainframe computers typically consist of a plurality of independent multi-processing units typically referred to as a “cell.” The cell represents the basic mainframe building block. That is, an administrator is able to logically associate two or more cells to define a single execution environment, i.e., a “partition,” on which an instance of an operating system and one or more software applications can be executed. Typically, the administrator of the mainframe computer defines a plurality of different partitions, each executing a different instance of an operating system and various software applications so as to provide a comprehensive computing environment.
In such computing environments it is often a challenge to implement IPMI. For example, the dynamic partitioning of mainframe computers is generally not compatible with the dedicated IPMB inter-chip interface used by conventional IPMI systems. Further, due to its broadcast nature, the IPMB offers little security other than distinct IPMI addresses to prevent cells of one partition from processing IMPB messages directed between cells of another partition, thereby reducing the logical isolation between partitions that is desired by most administrators of mainframe computers.